// FPGA hardware design guide based on real-world projects. Covers SystemVerilog, Vivado workflow, timing closure, CDC handling, and Xilinx 7 series device selection. Perfect for AI coding assistants and FPGA developers.
fpga-hardware-design-and-review-guide
git log --oneline --stat
HEAD
- Stars
- 5
- Forks
- 3
- Updated
- Apr 18, 2026
repo --stat
stars
5
forks
3
last update
Apr 18, 2026
license
MITv1.0.0
quickstart.sh
3 steps
- Install
// Drops SKILL.md into ~/.claude/skills/
$ claude skills add cobbpeng-fpga-hardware-design-and-review-guide - Invoke
// Run from any project directory
$ claude --skill cobbpeng-fpga-hardware-design-and-review-guide "wire up a GitHub Actions deploy" - Or copy this from the README
// extracted from a Usage / Example section
$ Multiplication bit-width = input bit-width + coefficient bit-width + 1 (sign bit) Accumulation bit-width = multiplication bit-width + log2(number of additions) + 1 (guard bit)
cobbpeng-fpga-hardware-design-and-review-guide/
references
- references/
- SKILL.mdopen
- README.mdopen
SKILL.md
readonly
- name:
- fpga-hardware-design-and-review-guide
- slug:
- cobbpeng-fpga-hardware-design-and-review-guide
- version:
- v1.0.0
- license:
- MIT
- author:
- @cobbpeng
- repository:
- github.com/cobbpeng/fpga-hardware-design-and-review-guide
- categories:
- tags:
- #agent-skills#ai-assistant#claude-skill#fpga#rtl#skills#systemverilog#timing-optimization
- description:
FPGA hardware design guide based on real-world projects. Covers SystemVerilog, Vivado workflow, timing closure, CDC handling, and Xilinx 7 series device selection. Perfect for AI coding assistants and FPGA developers.
README.md
cobbpeng-fpga-hardware-design-and-review-guide/README.md
16 sections
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